september 2013 docid025192 rev 1 1/4 for further information contact your local stmicroelectronics sales office www.st.com STEVAL-IFP015V2 galvanically-isolated 8 channel high-side driver based on the iso8200b data brie f features ? v cc operating voltage from 10.5 to 33 v ? 0.7 a for each channel ? reverse polarity protection on v cc and v dd supply voltage ? digital supply voltage v dd 3.3/5 v ? microcontroller interface direct/synchronous mode communication ? designed to meet requirements of iec 61000-4-2, iec 61000-4-4, iec 61000-4-5 standards ? rohs compliant description the STEVAL-IFP015V2 demonstration board works in combination with the steval- pcc009v2 or steval-p cc009v1 interface board to allow evaluation of all the features of the iso8200b device. a large gnd area on the printed circuit board has been designed to minimize noise effects and ensure good thermal performance. the iso8200b is a galvanic isolated 8 channel driver featuring a very low supply current. it contains 2 independent galvanic isolated voltage domains (v cc for the power stage and v dd for the digital stage). the ic is intended to drive any type of load with one side connected to ground. active channel current limitation combined with thermal shutdown, independent for each channel, and automatic restart protect the device against overload. additional embedded functions are: loss of gnd protection which automatically turns off the outputs in case of analog ground, undervoltage shutdown with hysteresis, and reset function for immediate power output shutdown. built-in thermal shutdown protects the chip against overtemperature and short-circuit. in overload condition, the channel turns off, then back on automatically after the ic temperature has decreased below a reset threshold. if this condition causes the case temperature to reach the tcr limit, the overloaded channel is turned off and will restart only when case and junction temperature have decreased down to the reset threshold. non overloaded channels continue to operate normally. an internal circuit provides an or-wired non latched common fault indicator signaling channel ovt. the fault pin is an open-drain active-low fault indication pin.
schematic diagram STEVAL-IFP015V2 2/4 docid025192 rev 1 out_e n uc vdd eart h vcc + - ext vd d +- sync load fault out1 out2 out3 out4 out5 out6 out7 out8 iso8200b vdd 5v 3.3v ext vd d gnd_power gnd_power vdd vdd fault id 0 in 1 in 2 in 3 id 1 id 0 id 1 sy nc load in 4 fault out_en in 5 in 6 in 7 in 8 out_en sy nc load in 1 in 2 in 3 in 4 in 5 in 6 in 7 in 8 3.3v 3.3v r27 10k c10 22nf/50v r18 10k c25 100pf/10v j4 con8 1 2 3 4 5 6 7 8 d3 green 2 1 c9 22nf/50v r13 15k c24 100pf/10v c15 100pf/10v c5 4.7nf y1 4kv r12 270r c2 1uf/50v mllc r9 270r c8 22nf/50v c23 100pf/10v c18 100pf/10v r14 270r r8 270r r26 10k r35 6k8 c20 100pf/10v r24 10k c7 22nf/50v trs1 sm15t33ca c22 100pf/10v r34 6k8 c16 22nf/50v r11 10k d2 red 2 1 d6 2 1 r7 270r r15 270r d13 stps 1l60 2 1 c3 1uf/50v d5 2 1 r19 10k r6 270r r28 6k8 r20 10k d1 stps 1h100a 2 1 d10 2 1 r5 270r u1 iso8200b nc #1 1 vdd 2 out_en 3 sync 4 load 5 in1 6 in2 7 in3 8 in4 9 in5 10 in6 11 in7 12 in8 13 fault 14 gnd_dd 15 nc #1 6 16 nc #1 7 17 nc #1 8 18 gndcc 19 nc #2 0 20 out8 21 out8 22 out7 23 out7 24 out6 25 out6 26 out5 27 out5 28 out4 29 out4 30 out3 31 out3 32 out2 33 out2 34 out1 35 out1 36 gnd _ep ep r33 6k8 r21 10k r23 10k r2 680r j1 1 2 d9 2 1 cn1 con30 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 r16 270r tp1 j2 1 2 r32 6k8 r3 680r d12 2 1 r31 6k8 r17 nc tp3 c11 22nf/50v r30 6k8 c13 100pf/10v r4 270r c12 22nf/50v tp4 d11 2 1 r1 680r r29 6k8 r22 10k c17 100pf/10v d8 2 1 c26 47uf/10v + c1 100uf/50v d7 2 1 c19 100pf/10v tp2 c21 100pf/10v d4 yellow 2 1 c6 220nf/10v r25 10k j3 1 3 2 jp1 2 4 1 3 c4 4.7nf y1/4kv r10 270r c14 22nf/50v smd0209131514 1 schematic diagram figure 1: STEVAL-IFP015V2 circuit schematic
STEVAL-IFP015V2 revision history docid025192 rev 1 3/4 2 revision history table 1: document revision history date revision changes 02-sep-2013 1 initial release.
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